Regviz

Silicon Labs /Series1 /EFM32GG11B /EFM32GG11B320F2048GL112 /EMU /IEN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IEN

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/Series1/EFM32GG11B/EFM32GG11B320F2048GL112/EMU/IEN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VMONAVDDFALL)VMONAVDDFALL 0 (VMONAVDDRISE)VMONAVDDRISE 0 (VMONALTAVDDFALL)VMONALTAVDDFALL 0 (VMONALTAVDDRISE)VMONALTAVDDRISE 0 (VMONDVDDFALL)VMONDVDDFALL 0 (VMONDVDDRISE)VMONDVDDRISE 0 (VMONIO0FALL)VMONIO0FALL 0 (VMONIO0RISE)VMONIO0RISE 0 (VMONIO1FALL)VMONIO1FALL 0 (VMONIO1RISE)VMONIO1RISE 0 (R5VREADY)R5VREADY 0 (VMONBUVDDFALL)VMONBUVDDFALL 0 (VMONBUVDDRISE)VMONBUVDDRISE 0 (PFETOVERCURRENTLIMIT)PFETOVERCURRENTLIMIT 0 (NFETOVERCURRENTLIMIT)NFETOVERCURRENTLIMIT 0 (DCDCLPRUNNING)DCDCLPRUNNING 0 (DCDCLNRUNNING)DCDCLNRUNNING 0 (DCDCINBYPASS)DCDCINBYPASS 0 (BURDY)BURDY 0 (R5VVSINT)R5VVSINT 0 (EM23WAKEUP)EM23WAKEUP 0 (VSCALEDONE)VSCALEDONE 0 (TEMP)TEMP 0 (TEMPLOW)TEMPLOW 0 (TEMPHIGH)TEMPHIGH

Description

Interrupt Enable Register

Fields

VMONAVDDFALL

VMONAVDDFALL Interrupt Enable
VMONAVDDRISE

VMONAVDDRISE Interrupt Enable
VMONALTAVDDFALL

VMONALTAVDDFALL Interrupt Enable
VMONALTAVDDRISE

VMONALTAVDDRISE Interrupt Enable
VMONDVDDFALL

VMONDVDDFALL Interrupt Enable
VMONDVDDRISE

VMONDVDDRISE Interrupt Enable
VMONIO0FALL

VMONIO0FALL Interrupt Enable
VMONIO0RISE

VMONIO0RISE Interrupt Enable
VMONIO1FALL

VMONIO1FALL Interrupt Enable
VMONIO1RISE

VMONIO1RISE Interrupt Enable
R5VREADY

R5VREADY Interrupt Enable
VMONBUVDDFALL

VMONBUVDDFALL Interrupt Enable
VMONBUVDDRISE

VMONBUVDDRISE Interrupt Enable
PFETOVERCURRENTLIMIT

PFETOVERCURRENTLIMIT Interrupt Enable
NFETOVERCURRENTLIMIT

NFETOVERCURRENTLIMIT Interrupt Enable
DCDCLPRUNNING

DCDCLPRUNNING Interrupt Enable
DCDCLNRUNNING

DCDCLNRUNNING Interrupt Enable
DCDCINBYPASS

DCDCINBYPASS Interrupt Enable
BURDY

BURDY Interrupt Enable
R5VVSINT

R5VVSINT Interrupt Enable
EM23WAKEUP

EM23WAKEUP Interrupt Enable
VSCALEDONE

VSCALEDONE Interrupt Enable
TEMP

TEMP Interrupt Enable
TEMPLOW

TEMPLOW Interrupt Enable
TEMPHIGH

TEMPHIGH Interrupt Enable

Links

()

Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data